Design Overview for topbez45

PropertyValue
Project Name:\\192.168.1.33\theo\xilinx\xc3sprog\bezier3c
Target Device:xc3s200
Report Generated:Friday 01/20/06 at 13:58
Printable Summary (View as HTML)topbez45_summary.html

Device Utilization Summary

Logic UtilizationUsedAvailableUtilizationNote(s)
Total Number Slice Registers:2153,8405% 
Number used as Flip Flops:119   
Number used as Latches:96   
Number of 4 input LUTs:3,3853,84088% 
Logic Distribution:    
Number of occupied Slices:1,9181,92099% 
Number of Slices containing only related logic:1,8331,91895% 
Number of Slices containing unrelated logic:851,9184% 
Total Number 4 input LUTs:3,4293,84089% 
Number used as logic:3,385   
Number used as a route-thru:8   
Number used as Shift registers:36   
Number of bonded IOBs:12217370% 
Number of Block RAMs:1128% 
Number of GCLKs:5862% 
Number of RPM macros:114   

Performance Summary

PropertyValue
Number of Unrouted Signals:All signals are completely routed.
Number of Failing Constraints:0

Failing Constraints

Constraint(s)RequestedActualLogic Levels
No Constraints Found   

Detailed Reports

Report NameStatusLast Date Modified
Synthesis ReportCurrentThursday 01/19/06 at 23:59
Translation ReportCurrentThursday 01/19/06 at 23:59
Map ReportCurrentFriday 01/20/06 at 00:00
Pad ReportCurrentFriday 01/20/06 at 13:58
Place and Route ReportCurrentFriday 01/20/06 at 13:58
Post Place and Route Static Timing ReportCurrentFriday 01/20/06 at 13:58
Bitgen ReportCurrentFriday 01/20/06 at 13:58