Property | Value |
Project Name: | d:\theo\xilinx_user\t\bezier |
Target Device: | xc3s200 |
Report Generated: | Friday 12/02/05 at 07:24 |
Printable Summary (View as HTML) | topbez_summary.html |
Logic Utilization | Used | Available | Utilization | Note(s) |
Number of Slice Flip Flops: | 96 | 3,840 | 2% | |
Number of 4 input LUTs: | 107 | 3,840 | 2% | |
Logic Distribution: | ||||
Number of occupied Slices: | 102 | 1,920 | 5% | |
Number of Slices containing only related logic: | 102 | 102 | 100% | |
Number of Slices containing unrelated logic: | 0 | 102 | 0% | |
Total Number 4 input LUTs: | 151 | 3,840 | 3% | |
Number used as logic: | 107 | |||
Number used as a route-thru: | 8 | |||
Number used as Shift registers: | 36 | |||
Number of bonded IOBs: | 3 | 173 | 1% | |
Number of GCLKs: | 1 | 8 | 12% | |
Number of RPM macros: | 8 |
Property | Value |
Number of Unrouted Signals: | All signals are completely routed. |
Number of Failing Constraints: | 0 |
Constraint(s) | Requested | Actual | Logic Levels |
No Constraints Found |
Report Name | Status | Last Date Modified |
Synthesis Report | Current | Friday 12/02/05 at 07:23 |
Translation Report | Current | Friday 12/02/05 at 07:23 |
Map Report | Current | Friday 12/02/05 at 07:23 |
Pad Report | Current | Friday 12/02/05 at 07:23 |
Place and Route Report | Current | Friday 12/02/05 at 07:23 |
Post Place and Route Static Timing Report | Current | Friday 12/02/05 at 07:23 |
Bitgen Report | Current | Friday 12/02/05 at 07:24 |